Clik here to view.
Executive Insight: Raik Brinkmann
Raik Brinkmann, president and CEO of OneSpin Solutions, sat down with Semiconductor Engineering to discuss where and why formal verification is gaining traction, and how it fits alongside other...
View ArticleTestbench Acceleration Performance Demystified
Part 2 in a series of papers that demystify the performance of SystemVerilog and UVM testbenches when using an emulator for the purpose of hardware-assisted testbench acceleration. In these three...
View ArticleClik here to view.
What’s Next For UVM?
The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to...
View ArticleMaking Verification Easier
SoC design teams increasingly are confronting complexity in the quest to target application segments, but at the same time they are struggling to more quickly reduce risk in their designs while also...
View ArticleOptimizing Testbench Acceleration Performance
Part 3 in a series of papers that demystify the performance of SystemVerilog and UVM testbenches when using an emulator for the purpose of hardware-assisted testbench acceleration. In these three...
View ArticleThe Future of UVM
It’s time for a frank discussion on the future of UVM. Given how UVM usage has grown and the number of teams that rely on it, I think this conversation has been a long time coming. Is continuing to use...
View ArticleGaps In The Verification Flow
Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at Mentor Graphics; Anupam Bakshi, CEO of Agnisys; Mike...
View ArticleEmulation’s Footprint Grows
It wasn’t that many years ago that Emulation was an expensive tool available to only a few, but it has since become indispensable for a growing number of companies. One obvious reason is the growing...
View ArticleToo Big To Simulate?
With system design complexity set on a steady upward trajectory, there are situations in which traditional simulation just can’t keep up. The alternative—and one being used by Google, Uber, Ford, GM,...
View ArticleGaps In The Verification Flow
Semiconductor Engineering sat down to discuss the state of the functional verification flow with Stephen Bailey, director of emerging companies at Mentor Graphics; Anupam Bakshi, CEO of Agnisys; Mike...
View ArticleClik here to view.
Formal’s Roadmap
Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of...
View ArticleClik here to view.
Formal’s Roadmap
Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of...
View ArticleHybrid Simulation Picks Up Steam
As electronic products shift from hardware-centric to software-directed, design teams are relying increasingly on a simulation approach that includes multiple engines—and different ways to use those...
View Article2017: Tool And Methodology Shifts
As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is...
View ArticleUsers Talk Back On Standards Process
One of the major themes of DVCon this year was the standard that currently goes by the name of Portable Stimulus (see related story, Portable Stimulus – The Name Must Change). It is not ready for prime...
View ArticleWhat Is Portable Stimulus?
When Accellera first formed the Portable Stimulus Working Group and gave it that name, I was highly concerned. I expressed my frustration that the name, while fitting with what most people thought...
View ArticleThe Week In Review: Design
M&A Synapse Design acquired Asilicon, a design services firm based in Ranchi Jharkhand, India. Through the acquisition, Synapse Design adds a second design center in India and gains an additional...
View ArticleRediscovering Coverage Insurance
When coverage comes up in conversation, if it comes up at all, it’s always a matter of car, home or health insurance. Coverage and functional verification are unlikely to be used in that discussion, or...
View ArticleClik here to view.
Whatever Happened to High-Level Synthesis?
A few years ago, High Level Synthesis (HLS) was probably the most talked about emerging technology that was to be the heart of a new Electronic System Level (ESL) flow. Today, we hear much less about...
View ArticleClik here to view.
Verification Unification
There is a lot of excitement about the emerging Accellera Portable Stimulus Working Group (PS) standard. Most of the conversation has been about its role in simulation and emulation contexts, and in...
View Article